Variable monitoring system

ABSTRACT

An alarm system for monitoring a large number of variables and for producing a permanent printed record of the exact times when variables changed their state. A scanner counter periodically scans a plurality of annunciator circuits, each of which is associated with a variable. Whenever the scanner locates an annunciator circuit whose state indicates that the associated variable has changed its state since the last scan, the number of the associated variable is retrieved from the scanner counter and the time in seconds and fractions of a second is retrieved from a counter clock. This data and other data is assembled and fed serially into an expandable shift register memory. A teleprinter output logic circuit then retrieves the data from the other end of the expandable memory and feeds it slowly to a teleprinter, along with the time in minutes and hours, and the date in days.

KEN

MEMORY SHIFT PULSES I6 COUNT PULSE INVENTORI NETH C. LINDER By Wm,MMM/41d,

faQ/awa Patented July ll, 1972 27 Sheets-Sheet 5 i VL @P mwJJLwzoww mIGT FL w FL Nm VH om alcldzdlccgcggg: s Ici:FCCCQCCZCCCFCCCCCI@ ccc::Cczzzzzczrzl ldlcjlglgggggzgz; EC::C:::C:::ggg:

KENNETH C. LINDER AHys,

Patented July l1, 1972 27 Sheets-Sheet 4 GATED PR (TO FIG 4D) INVENTORIKENNETH C. LINDER Patented July"l 11, ,1972

27 Sheets-Sheet 5 FIG 4A 400v ANNUNCIATOR CIRCUIT AND vI OGIC I sETTo-P1 I'EET'PTD: {"ETDTB1 TESTO-FBT FEET-0F61, |POINT CARD# IPOINT CARDSI|POINT CARDSI IPOINT CARDS' [POINT CARDSl L Q I I I..- Q ..I I 0 J L Q.J oOO l IOO HUNDREDS 200 DECIMAL 300 OUTPUT 488 PROM f SCANNER G00 FIS3) 700 I sOo l SoO l I Q 1 r' \Q i I- Q I I Q 1 QL I :SET OFIO ISETOFIOI l SETOF IOI :SETOFIO' I SETOFIO: EPQIMARQSI LPPJELCABEIEPSI'ESABDEI LPSIELCERESI LPS' N TSABESJ [-76.411 TYPICAL SET OF IOPOINT CARDS T T T T T (4NI z z z z z I I POINT CARD POINT CARD POINTCARD POINT CARD POINT GARD l W W V IA VI I Ioo j IO l TENS DECIMAL 40 IOUTPUT 50 FROM 60 SCANNER Igg l (FIG. 3) |90 w w w w w I I POINT CARDPOINT GARDl POINT CARD POINT CARD POINT CARD I Z Z Z Z Z L I L L L Jzum@ F1646 TYPICAL POINT CARD wI4BI I I I I I Y Y Y Y Y ANNUNC. CKT.ANNUNC. CKT. ANNUNC. CKT ANNUNC. OKT ANNUNC. CKT X X X X X o-I I UNITS 2DECIMAL OUTPUT 5F FROM e SCANNER g (FISSI 9i I X X X X X ANNUNC. CKT.ANNUNC. CKT. ANNUNC. OKT ANNUNC. CKT. ANNUNC. CKT. Y Y Y Y Y I I. ,L 1

INVENTOR:

KENNETH C. I INDER Bygw,

M 'f// AHvs.

27 Sheets-Sheet 7 500 EVENT LOGIC AND EVENT FLIP FLOP GOO ASSEMBLY SHIFTREGISTER CONTROL LOGIC S0 (2D) i r/' G.6`B T2 (2B) 2 F R IS R CLEAR GIOT4 (2131 --nl I 1e COUNT L 40N LOAD sHlFT REGISTER FROM PULSE (2F) l jSECOND INPUT MEMORY LOAD ENABLE (6A) S. 2D1 -l I ,/FG 2 T4(2B) 3 0rRESET MEMORY LOAD I ENABLE (6A) l INVENTOR;

KENNETH C. LINDER By Mana/Larbi f/ZZ/wv/ .1.

' Ams.

IOOOUNT 2 111 PULSE (2F) l lt7) MEMORY FT I` PULSES( I 62o SHIFTREGISTER SHIFT PULSES @w MEMORY LOAD 52g ENABLE (6A) j T2 (2B) l l l J33m,` 63() LOAD SHLFILSREOIIEER FROM l gg MEMORY LOAD I ,E ENABLE (6A)1o mo LLI 8 .vv e e h S .Tv e e h s )7, 2 7 9 l 1L, 1 1W ux IJ. .m n C ta. Dn.

SET TIME ASSEMBLED DATA (TO EXPANDABLE MEMORY 1400) lNVENTOR KENNETH C.LINDER By WMZ-f PULSE Atfys.

3'? Sheets-Sheet 9 F168 y 80o CODE NUMBER GENERATOR MAINTENANCE I MODE(27A) SUMMARY MODE- 2 MEMORY LOAD ENABLE (6A) MAINTENCE MODE (27A) RESET(6C) I CODE aos 2 NUMBER OUTPUT ALARM (5A) RETURN To 2804 N ORMAL (5A)FIG. 9

90o |20 CPS CLOCK G VO LTS 2 MED. 93o 920 GROUND v .5K c K J Q J Q T3(2B) y SO (2D) INVENTOR.

KENNETH C. LINDER Patented July 11,-1972 A.2'7 Sheets-Sheet iO IOOOSECONDS COUNTER M, Www/kfw AHvs.

27 Sheets-Sheet 1l IIOO MARKER BIT FLIP PLOPeI LOCIC F1611 MINUTESCOUNTER.

ADVANCE PUSH BUTTON AND PULSE FORMING LOGIC ATE I MINUTES gSESE (20)IIOe COUNTER 3 ADVANCE I PULSE so (2D) 2 IIoa 2 "0 MARKER I PPM (IO) I II BIT J /-f MARKER BIT FLIP FLOP OUTPUT ENABLE (I8DI SET TIME PULSE (7)MAINTENANCE MODE (27) |200 MEMORY FULL FLIP FLOPBI LOGIC FIG. IZ

IaIo -J o 2 999 PULSE-1(3) 120B K E" Izoe f SCAN INHIBIT (5C) C K o I S,(2D) I2O2L ,204

J Q OVERLOAO BIT MEMORY FIJLL r MEMORY I-'IJLL`j (I4) FLIP FLOP IINVENTOR:

Attys.

Patented July 11, 1972 MEMORY 'LTA DATA E PTY READY READY Sheets-Sheetl5 MQB K XCR PULSES SHIFT MEMORL MEMORY DATA (TO TELETYPE OUTPUT LOGIC|500) oM40 I SP UtCJ E5 TbATA |4OO EXPANDABLE MEMORY FIG. I4

ASSEMBLED DATA(FROM) ASSEMBLY SHIFT REGBTER 700) I/VVENTOR AfforneysPatented July 11, 1972 27 Sheets-Sheet 14 Fl l5 ISOO TELEPRINTER OUTPUTLOGIC DATA SHIFT COMMAND DATA UNES MEMORY DATA FROM MINUTES, glooNULLTTYL IE HOURS,AND OIID/RAIRBIT 1 DAYS I COUNTERS IFIG.2I) |500(FIG,I3) 2300 SUMLMABL., RRRSIIIBR IF. 23) 1gb-gm@ RIRIIIBEL 2400TELEPRINTER 2200 E SIGNAL MFTDBLMAND h 1 GENERATING ENERATORIFIG-22I. 5LOGIC DATA 'z5 5 a SHIFT D' Emo I- IFIG.24I. A COMMAND o S m t 2 zooo gc o MEMORY UPDATE PuLsE I- u. DATA GENERATOR z v (FIs.2oI

UJ 3 23 2R Y. x

5 DATA Ieoo DATE o READY F TELEPRINTER TTY E PRINTOUT H/MY E MEMORY`FORMAT co)NTRoI. TELEmIgJR w EMPTY FG- '8 TTY SIGNAL To E E MOTORCONTROL )Tg'a-SSRNTER I-LI-I LL Z I m FIND g2 In o Y NEXT :Iz I I ISUMMARY w om Isoo LINE ERASE COUNTER REsET L PULSE cIRcuIT O (FIG. Is)m5 OUTPUTA Isoo IDO: ENABLE RESET PULSE TELE 0 UPDATE I PRINTER 55PUL'SE |700 TIMING j BIT AND cI-IARAcTER CLOCK couNTERs (FIETS) (FIGA-r)INVENTOR A fforneys Patented July l1, 1972 3,676,878

2? Sheets-Sheet 1 5 |600 TIMING CLOCK /G I6.

LINE CLEAR TIMING PULSE 2 COUNT INVENTO/' KENNETH C. L/NDER By WMV, f/

frorneys Patented July 11, 1972-` '2? Sheets-Sheet le |700 BIT ANOCHARACTER COUNTERS l F16. [7a

TTY PULSES (I6) EBD- COUNT l is' 2 B2B-2 OUTPUT N COUNT i 22B-s ur'aENABLEued) T COUNTER 5 35E?, Bum) (|702) e 85@ TELEPRINTER 1 r:7e-1OUTPUT 8 :s i8 TIMING 9 0@ PULSES |O RESET CARRYH Bilv :T

l Cl

2 02g 3 cs2- COUNTER '3 COUNT 4 24e-4 REsEJ9ULsE COUNTER gjg C(Character) (|704) T fgcj TELEPRINTER B Z9@ OUTPUT 9 C9 ll mom TIMINGSlll-I l2 CIZT RESET B@- KENNETH C. L/NDER By WMM, MMV -fv/ ftorneysPatnte'd July l1, 1972 27 Sheets-Shes |800 TELEPRINTER PRINTOUT FORMATCONTROL Fig z )C COUNTER c 6 (|70) U6) '822 I RESET A TTY RESET -l 2|824 TTY MOTOR m CONTROL ENABLE C6 Co C6 DATE TTY DATA v READY (I4) clala |e|4 -q |a|s .lo JQPJQ `DATETTY DATA READY (|4) lazo A 52 (2d) H/MENABLE l 2 DATE,T|ME REQUEST PULSE f PUSH aUTToN AND lem PULSE FoRMlNG",QER FIG. [8G Loe|c TTY PULSES ,/Fl G. [8b

, 2 L COUNTER c a (|7a) E; RES ET TTY RESET !:KCQ K o 'q |832 -c |834H/M J sa J o TTY' UPDATE 4T PULSE (2O)f TTY PUL) wy Ty [8C A/N ENABLEA/N CLEAR MEMORY l, PULSE PULSE A COUNTER EM PTY||4| 2 may RESET C AAINENABLE TTY RESET c c U6) L-K Q K A/N TTY 'ol842 o |844 (le) Q E A/N TTYTTY PULSE DAT-E *TTY @c ENABLE H/M TTY |852); OUTPUT ENABLE A/N TTY INVEN TOR KENNETH C. L/NDER By W, mfG-*vw Patented July l1, 1972 27Sheets-Sheet 18 FIG. I9 ISOO COUNTER RESET CIRCUIT RESET AFTER CS.DURING w 80, DATE PRINTOUT J RESET AFTER CS DURING Usb) HOURS/MIN.PRINTOUT U) E RESET wHEN MEMORY EMPTY I K 5 w (me, DURING A/N PRINTOUT(D uJ 4 |902 |904 r RESET AFTER ce wI-IEN g (2 OvERLOAD BIT IsENCOUNTERED -J Q u, DURING A/N PRINTOUT LITTER g 5% RESET AFTER ceDURING PULSE D SUMMARY SUMMARY OR MAINTENANCE O A/N PRINTOUT I U (23) mq63 RESET AFTER cl3 25 I7 a) U'll) MEMORY -T LINE CLEAR @W''ISSE TIMINGPULSE (I6) PULSE 2000 UPDATE PULSE GENERATOR A/N TTYIIscI TTY SYNC (IS)INHIBIT 52 FIRST BIT MEMORY DATA #l5-L READOUT TTY RESET 6) g-Kc EN): u#PDATE H1 2004 2 PULSE A/N ENABLE 08) J `Q INVENTOR F l 6. Z0 KENNETH1L/AIDER Attorneys Patented Juy 11, 1972' 27 Sheets-Sheet 19 2IOOOVERLOAD BIT DETECTOR 2200 DATA SHIFT COMMAND GENERATOR A/N TT-Y (I6) if(We) 2202 C8 BU INH BIT FIRST U4 LOCATION TIME READ O T MARKER BITMETER? READOUT CODE NUMBER READOUT FIG. 22

1 CO a232 COMMAND DE NUMBER READOUT 2300 CODE NUMBER TRANSLATOR F 6- 23l F C 6 fum '@3332 NENXQT cOOE NUMBER l 2 READOUT (22) 1- 2 SUMMARYMEMORY DATA (I4) SUM M"`A` RY TTY SYNC W' 2 23"* P' Rl'NT-O'U'T B ww oPRINTOUT c 77u) wey-L M'ATN' TENA-NCE 3 2304 2 PR |'NT OUT B 4 |7 4" l/V VEN TUR KEN/VE TH c. L/NDER Afforneys

1. A variable monitoring system comprising: a plurality of annunciatorcircuits each associated with a monitored variable and able to generatesignals indicating the state of the monitored variable and alsoindicating a change in the state of the monitored variable; scanningmeans, including a scanner counter, connected to the conditionresponsive circuits for extracting signals from each of the conditionresponsive circuits sequentially as the scanner counter advances; eventlogic means for analyzing the extracted signals and for initiating adata collection each time a condition responsive circuit is found to begenerating signals indicating a change in the state of the monitoredvariable; a clock; an assembly shift register in which data can becollected having parallel inputs and a serial output, said parallelinputs including inputs from the scanner counter and from the clock;assembly register control means activated by said event logic forcontrolling the loading of data into said assembly shift register; ashift register memory connected to the output of said assembly shiftregister; and output logic means for feeding data out of the shiftregister memory at a low speed and for recording the data permanently.2. A variable monitoring system in accordance with claim 1 and includinga code number generator connected to the event logic and to the inputsof the assembly shift register for adding a record of the variable stateto the data assembled within the assembly shift register.
 3. A variablemonitoring system in accordance with claim 1 wherein the event logicgenerates a scan inhibit signal that stops the scan until after data hasbeen assembled.
 4. A variable monitoring system in accordance with claim3 wherein the scan inhibit signal is generated by an event flip-flop,said event flip-flop being set by an event pulse generated by the eventlogic means, and said event flip-flop being cleared by the assemblyregister control means after data has been assembled.
 5. A variablemonitoring system in accordance with claim 1: wherein the shift registermemory generates a memory full signal which is fed back to the assemblyregister control means to stop the data assembly process when the shiftregister memory is full.
 6. A variable monitoring system in accordancewith claim 5 and including a memory full circuit that is enabled by thememory full signal to add a marker bit to data assembled within theassembly shift register at a later time.
 7. A variable monitoring systemin accordance with claim 6 and including means for terminating theoperation of the memory full circuit after a complete scan during whichno data is assembled.
 8. A variable monitoring system in accordance withclaim 1 in which the states of the monitored variables are representedby a plurality of variable monitoring switches, and which includes aplurality of interconnecting circuits connecting said conditionresponsive circuits to said variable monitoring swiTches, each of saidinterconnecting circuits including closely matched resistive andcapacitive elements, and each of said interconnecting circuitsestablishing a uniform time delay at the input to each conditionresponsive circuit to equalize the response times of all the conditionresponsive circuits.
 9. A variable monitoring system in accordance withclaim 8 wherein one of the matched capacitive elements includes theinput capacity of an active amplifying device.
 10. A variable monitoringsystem in accordance with claim 9 wherein the active amplifying deviceis a transistor.
 11. A variable monitoring system comprising: aplurality of condition responsive circuit means for monitoring aplurality of variables; scanning means for periodically and seriallyscanning the condition responsive means; data collection and storagemeans for collecting and for storing data relating to the monitoredvariables; output means for generating an output signal bearing dataretrieved from said data collection and storage means; summary modelogic means for causing said data collection and storage means tocollect and store data whenever said scanning means scans an annunciatormeans associated with a variable that is in the alarm state; said datacollection and storage means including means for temporarily disablingsaid summary mode logic means each time data is collected and stored;and said output means including means for generating a find next summarysignal to re-enable said summary mode logic means when said output meansceases to generate an output signal.
 12. A variable monitoring system inaccordance with claim 11 and further including: a buffer into which avariable number supplied by the scanning means is stored whenever thesummary mode logic means is temporarily disabled; comparator means forcomparing the variable number stored in said buffer with the variablenumber presented by the scanning means, and for generating a successfulcomparison signal when the two numbers are the same; and re-enable delaymeans for preventing the find next summary signal from re-enabling thesummary mode logic means until the successful comparison signal isgenerated.
 13. A variable monitoring system in accordance with claim 11wherein the summary mode control means is automatically disabledwhenever the scanning means encounters an condition responsive circuitmeans associated with a variable that has changed its state since thelast previous scan.